Modeled and measured instruction fetching performance for superscalar microprocessors

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Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors

Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its performance both in theory and in simulation using the SPEC95 suite of benchmarks. In all the techniques, the fetching performance is dramatically lower than ideal expectations. To help remedy the situation, we also evaluate i...

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ژورنال

عنوان ژورنال: IEEE Transactions on Parallel and Distributed Systems

سال: 1998

ISSN: 1045-9219

DOI: 10.1109/71.689444